Dynamic Random Access Memory (DRAM) is a form of memory currently used in computer systems. DRAM uses capacitors as part of the circuits that store data. Because capacitors are not ideal, they eventually lose their charge. If the capacitors in the DRAM lose enough charge, the data stored in the DRAM may be lost.
To counter this problem, DRAM can refresh the data it stores. Essentially, all the data is read out of the DRAM, then written back. By writing the data values back into the DRAM, the capacitors are recharged, and can continue to store the data.
Because refreshing data requires being able to read the data from the DRAM, a refresh operation needs to occur before the capacitors in the DRAM have lost too much charge. How long it takes before the capacitors have lost too much charge depends on the implementation of the DRAM. In one standard, the refresh is scheduled to occur every 64 milliseconds (ms).
But because a refresh operation requires reading and writing the data from the DRAM, performing a refresh can interrupt other operations using the memory. For example, an application might be reading some data from the DRAM when a refresh needs to occur. The read operation must wait until the refresh has completed: if not, data values might be lost. This delay is not insignificant: depending on the specific implementation of DRAM, the delay caused by a refresh operation can be 18.5% or more. And the delay caused by refresh will only increase as the density of DRAM and the speed of operations increase.
A need remains for a way to reduce the impact of refresh operations on DRAM.